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ZEROPLUS USB Logic Analyzer LAP-C(162000)

ZEROPLUS USB Logic Analyzer LAP-C(162000)

(해외배송 가능상품)
기본 정보
상품명 ZEROPLUS USB Logic Analyzer LAP-C(162000)
판매가 2,200,000원
상품정보 16ch 64Mb Logic Analyzer
상품코드 P0000JTF
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상품명 상품수 가격
ZEROPLUS USB Logic Analyzer LAP-C(162000) 수량증가 수량감소 2200000 (  )
총 상품금액(수량) : 0 (0개)
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이벤트

USB Logic Analyzer LAP-C(162000)

Specifications

Sampling Frequency
Internal Clock (Timing) (Asynchronous): 100Hz~200MHz
External Clock (State) (Synchronous): 100MHz

Test Signal
Bandwidth: 75MHz
Range of the Trigger Voltage: -6V~+6V
Resolution of the Trigger Voltage: ±0.1V

Memory
RAM Size: 64Mbits
Memory Depth per Channel: 2Mbits (Max 512Mbits for compression)

Trigger
Trigger Mode: Pattern/Edge
Trigger Channel: 16 CH
Post-Trigger: YES
Trigger Level: 1 Level
Trigger Count: 1~65535

Software Function
Data Compression : Max 2M bits x 256
Time Base Range : 5ps~10Ms
Language : Chinese (Traditional/Simplified) English
Maximum Trigger Page : 8192 Pages
Waveforrm Data Display
Filter&Filter Delay
Trigger Delay
Unlimited lncreasing Bar
Automatic Attaching Bar
Automatic Software Upgrade
Data Statistic
Auto-Save
Filter Bar
Protocol Analysis
Protocol Packet List
File Export
Data Contrast
Latch Function
Protocol Analyzer Trigger: parallel
Pulse Width Trigger Module : option

Power Supply
Power Supply: USB (DC 5V, 500mA)
Power Consumption at Rest: 1W
Max. Instant Power at Work: 2W

Others
System Support: Windows 2000 / XP(32bits) / Vista / Win 7
Error in Phase: < 1.5ns
Max. Input Voltage: ±30V
Input Resistance: 500KΩ/10pF
Safety Certification: FCC / CE / WEEE / RoHS / REACH

Extending Channel Capture
Not support

Double Mode
Channels:16 channels
RAM Sizes: 4M

ItemMinTypicalMax
Working Voltage
DC 4.5VDC 5VDC 5.5V

Current at Rest
200mA

Current at Work
400mA

Power at Rest
1W

Power at Work
2W

Vinput of Testing Channels
- 30V+ 30V

Vreference
- 6V+ 6V

Impedance
500KΩ/10pF

Working Temperature
5 ℃70 ℃

Storage Temperature
-40 ℃80 ℃

 


Feature

The Buttons on the Logic Analyzer Hardware Own the Function of Sampling.
There is a START button on the hardware of Zeroplus Logic Analyzer, and pressing this button can make the Logic Analyzer sample signals when the software of Logic Analyzer is activated. Users can quickly capture data from the testing board by using the START button.

Compression
Zeroplus Technology issues the patent technology of Waveform Compression which can capture more waveform data without adding the size of the RAM.
For example: The RAM Size is set as 1M, and the Sampling Frequency is set as 50MHz. When the Compression function is not activated, Zeroplus Logic Analyzer can only capture waveform data within 20.972ms; when the Compression function is activated, with the same RAM Size (1M) and Sampling Frequency (50MHz), the Logic Analyzer can prolong the waveform data to 3.999s. That is to say, the function of Waveform Compression can improve the amount of the captive data largely.

Signal Filter Delay
Zeroplus Technology issues the patent technology of Signal Filter Delay. The function of the Signal Filter Delay can capture the signals conditionally. For example, the Filter Condition of Channel A1 is set as High Level; the differences can be seen obviously by the horizontal windows. And the Filter Delay Setup can make the conditions of the Signal Filter more flexible; users can set the time of the Filter Delay as their requirements.
For example: Clients found Bugs in a group of DUT. The content of the Bug is that a read error may be presented while the program tries to read the data. At that moment, users can use the function of the Signal Filter Delay to capture signal conditionally and analyze the Bug further (the Status of the Read is 0X5A; the Command Period of the Read is 10us). According to the function of the Signal Filter Delay, Zeroplus Logic Analyzer can only capture the 10us Command Period to analyze the Bug when the Data of 0X5A is presented.

Trigger Page
Zeroplus Logic Analyzer adds the patent technology of Trigger Page, in other words, the Trigger Page is to page the continuous and long signal data.
Set the present RAM Size as one page, and the position of the trigger point is the first page. After analyzing the data of the first page, users can set the Trigger Page as "2" and restart the Logic Analyzer when the data of the testing board are the same for each time and the setting of the trigger condition is not to be changed; when the Logic Analyzer stops capturing the data and completes the display, the content of the Waveform Display Area is the data of the second page which follows the data of the first page.
For example: The RAM Size is set as 32K; the Sampling Frequency is set as 200MHz; the Trigger Page is set as "1". The end point of the captured signal is 147.465us and the former half part of the data is 0X47. When starting to capture data with the same RAM Size and Sampling Frequency and setting the Trigger Page as "2", the start point of the captured data is 147.465us which is the end point of the first page, and users can see the latter part of the data, 0X47.

Trigger Count
Zeroplus Logic Analyzer adds the technology of Trigger Count. The Trigger Count function is suitable for this kind of tested signals which have more than one trigger signal according with the Trigger Condition. Users can decide the trigger position where the trigger signal accords with the Trigger Condition. When users want to trigger at the first time when the trigger signal accords with the Trigger Condition, the setting of Trigger Count should be "1" (it is the default); when users want to trigger at the third time when the trigger signal accords with the Trigger Condition, the setting of the Trigger Count should be "3"; the others can follow the former method.
The Max. Trigger Count can be set as "65535".

Find Pulse Width
Zeroplus Logic Analyzer adds the function of Find Pulse Width which can compare and search the pulse width. For instance, the period of some waveform is 4.2us (the positive/ negative period is 2.1us respectively), but it can cause the period error sometimes; at that moment, users can use the function of Find Pulse Width to mark the error point, and it improves the efficiency for engineers to complete the Debug.

Decoding Example of Protocol Analyzer - The Decoding of Protocol Analyzer SSI
The Protocol Analyzer SSI Decoding Module of Zeroplus Technology can help users to analyze the Protocol Analyzer SSI. The data of the RD/TD in signals can be directly displayed on the screen according to the Decoding Module. The Protocol Analyzer SSI Decoding Module of Zeroplus Technology provides different SSI settings, such as Normal Mode and Network Mode. Users can set it as their requirements when analyzing the SSI Signal.

 


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